Assess

Independent LrrK research · Edition 2026-11-01.3

Hardware Attack Library (HAL)

Hardware-first evidence for drones, robotics and embedded devices: what researchers actually showed, on which device, with what access, and what stayed unresolved. Records are organised by the hardware threat classes in MITRE EMB3D™, with ATT&CK® cross-references only where a source supports them. LrrK endorses this framework as an independent effort of the security research community and is not affiliated with or endorsed by The MITRE Corporation.

89 reviewed evidence records · 5 pending leads · 20 closed lead reviews (15 resolved to records, 3 reviewed as context only, 2 reviewed and excluded) · reviewed through 1 November 2026. Context-only reviews are background, not demonstrated attacks. Several records share a paper or experiment, so these are not 89 independent attacks. Coverage means representation in this documented corpus — not every device, attack or source on the internet.

EMB3D Framework

Counts are records in this documented corpus, including discussions and reported results; they are not independent experiments, exhaustive coverage or confirmed device applicability. Choose a threat to filter the evidence.

Reviewed evidence records

Showing 4 of 89 reviewed records for EMB3D TID-114 Peripheral Data Bus Interception. Default order: hardware, then device interface, then context; within each, drones and robotics first, then fault-injection learning.

Full archived edition (JSON) ↓
HardwareDrones & roboticsDemonstrationLRRK-20261101-DR2-002Dynamixel AX-12A actuator interposer: command suppression and fabricated status on a bench77/100
Bounded outcome
The controller completes the communication protocol despite the withheld instruction. The paper separately evaluates response-timing detection of the inserted module under its tested message sequences and latency conditions.
Stated claim
The authors implemented an inline FPGA module that can forward, suppress or alter actuator communication. The illustrated suppression experiment returns fabricated status while withholding the controller instruction from the actuator.
Evidence status
Author reported controlled demonstration (author-reported-controlled-demonstration)
Device, firmware & configuration

Description: Dynamixel AX-12A servomotor using protocol 1.0 and FPGA controller/interposer logic on an Artix-7 XC7A100T Configuration: Half-duplex UART actuator chain and a laboratory FPGA attack module. The concrete illustrated suppression/status trace uses an LED instruction; the complete hybrid hexapod is future work.

Access required

Physical insertion of an active module between the low-level controller and actuator communication chain.

Scope / hardware boundary
Physical peripheral-bus interposition; no processor clock fault, demonstrated supply-chain implant, full-hexapod takeover or drone attack.
Dates
Published: 14 December 2025 · Reviewed: 1 November 2026 — Publisher date: 14 December 2025; experiment dates not separately established.
Mechanisms
Peripheral-bus interposition; Command suppression; Status spoofing

Sources

Limitations

  • Do not generalize the AX-12A/protocol-1.0 experiment to every Dynamixel product or an assembled operational robot.
  • The clearest illustrated suppression experiment concerns an LED command; unsafe physical movement or gait takeover is not established.
  • No independent reproduction or original implementation repository reviewed.
  • The reported 100% true-positive result applies to the tested sequences, including a transparent interposer; it is not universal detection accuracy. Table 6 reports material LED false positives (21.4%), versus 1.2% for Move and 0.25% for Ping.
  • A miniaturized concealed implant is proposed, not an observed deployment.
  • No ATT&CK/ICS procedure mapping is asserted for this bench study.

Follow-up

Performed

  • Read the original hardware, protocol and attack-module sections.
  • Read the conclusion and future-work boundary rather than generalizing the platform description.
  • Searched the exact title for artifacts, correction and independent validation.
  • Compared the demonstrated bus behavior with official TID-114.

Result

  • The bench interposer result is supportable; operation of the complete hexapod under attack was explicitly deferred by the authors.

Unresolved / next

  • Review original HDL, traces or a physical-platform follow-up if released.
  • Validate response-timing detection under different firmware, message loads and environmental conditions before adopting it.

Evidence confidence · 77/100

Confidence components for LRRK-20261101-DR2-002
ComponentScoreReason
Provenance20/20Original publisher article, author list and date were inspected.
Technical evidence30/35The original attack design, reported communication traces and table text were read; raw captures/HDL were not independently validated.
Configuration specificity19/20Named actuator, protocol and FPGA are explicit, with the LED-command and full-robot limits retained.
Independent corroboration0/15No independent reproduction found; shared authors with the 2017 study do not add independent evidence.
Follow-up resolution8/10Resolved the bench versus full-hexapod scope and preserved the timing-detector false-positive limits.

Overall rationale LRRK evidence strength for the narrowly stated claim; not severity, exploitation probability, current-device applicability, safety or an official MITRE score.

Framework mappings

Original record: https://www.mdpi.com/2079-9292/14/24/4909 (opens original source in a new tab) · Share: link to this record

HardwareDrones & roboticsDemonstrationLRRK-20261101-DR2-001Robotics I2C bus-clock interference: real motor hardware with a virtual navigation trajectory76/100
Bounded outcome
Real motors retained preceding speed commands; encoder-fed virtual navigation deviated from the planned roundabout path. A proposed frequency-sensor defense stopped the motors during the disturbance and resumed the path afterward.
Stated claim
The authors disrupted the I2C SCL bus clock so selected motor commands were suppressed while acknowledgments kept the controller believing communication had succeeded.
Evidence status
Author reported controlled demonstration (author-reported-controlled-demonstration)
Device, firmware & configuration

Description: MD23 motor-driver/controller and real motors/encoders, FPGA communication modules and a MATLAB path controller Configuration: Hardware-in-the-loop bench emulating a differential-drive robot. Encoder measurements update a virtual trajectory; no freely navigating assembled robot or UAV was tested. Section 3.4 implements sensor VHDL for a Spartan3AN700 FPGA and separately uses post-route simulation for oscillator behavior. Exact bitstream and controller/firmware revision were not established.

Access required

Physical control of an added module on the I2C communication path.

Scope / hardware boundary
Peripheral-bus clock/protocol manipulation; no processor instruction-clock or CPU control-flow fault was demonstrated.
Dates
Published: 25 March 2017 · Reviewed: 1 November 2026 — PMC publication date and citation metadata are 25 March 2017; April is the collection month, not the experiment date.
Mechanisms
I2C bus-clock interference; Command suppression; False acknowledgment

Sources

Limitations

  • Virtual trajectory reconstructed from real encoder speeds; no physical robot navigation, crash or flown drone compromise was demonstrated.
  • No independent reproduction or original experiment repository reviewed.
  • Earlier and later papers by the same research group do not count as independent corroboration.
  • The frequency-sensor motor-stop observation is a bounded bench result; separate post-route sensor simulations do not establish fabricated-CMOS validation or a safety guarantee.
  • No ATT&CK/ICS procedure mapping is asserted; the study did not establish an industrial-control intrusion.

Follow-up

Performed

  • Read the original methods/results and explicit emulation description.
  • Searched exact-title follow-up/correction/replication terms and earlier same-team work.
  • Checked the current official TID-114 definition against the pinned framework name.

Result

  • A bounded robotics bus-manipulation account is supported. The word clock in the title does not support a CPU clock-glitch claim.

Unresolved / next

  • Review a released experiment artifact or independent reproduction if one becomes available.
  • A real mobile-platform assessment needs its own bus topology, software and motion evidence.

Evidence confidence · 76/100

Confidence components for LRRK-20261101-DR2-001
ComponentScoreReason
Provenance20/20Original peer-reviewed article and publication metadata were inspected.
Technical evidence30/35Relevant experimental methods and reported encoder/control results were read; raw measurements and implementation artifacts were not independently validated.
Configuration specificity18/20MD23, real motor/encoder components, sensor FPGA family and virtual-trajectory boundary are explicit; exact bitstream/firmware artifact pins remain missing.
Independent corroboration0/15No independent reproduction established; same-team publications and catalogs are not reproductions.
Follow-up resolution8/10Resolved bus-clock versus CPU-clock ambiguity and real-hardware versus virtual-navigation scope; artifact follow-up remains open.

Overall rationale LRRK evidence strength for the narrowly stated claim; not severity, exploitation probability, current-device applicability, safety or an official MITRE score.

Framework mappings

Original record: https://pmc.ncbi.nlm.nih.gov/articles/PMC5419790/ (opens original source in a new tab) · Share: link to this record

HardwarePrimary hardware researchDemonstrationprimary-siemens-root-of-trust-2023Siemens S7-1500 immutable-root-of-trust weakness and hardware revisions91/100
Bounded outcome
Original research describes boot-image replacement and protected-boot bypass; Siemens confirms the hardware root-of-trust issue and identifies newer fixed hardware for selected CPU types.
Stated claim
Siemens S7-1500 immutable-root-of-trust weakness and hardware revisions
Evidence status
Published research demonstration (published_research_demonstration)
Device, firmware & configuration

Description: Affected Siemens SIMATIC/SIPLUS S7-1500 CPU product variants Configuration: CVE-2022-38773. Vendor SSA-482757 V1.5, updated 2025-01-14, enumerates product-specific affected versions and replacement hardware.

Access required

Physical tampering with affected PLC hardware and storage/peripheral trust paths.

Scope / hardware boundary
CVE-2022-38773. Vendor SSA-482757 V1.5, updated 2025-01-14, enumerates product-specific affected versions and replacement hardware.
Dates
Published: 10 January 2023 · Reviewed: 1 November 2026 — Publication date precision: day.
Mechanisms
ROM/NVRAM Data Extraction or Modification; Peripheral Data Bus Interception

Sources

Limitations

  • Affected product lists are not interchangeable with the entire S7-1500 family.
  • Hardware replacement/fix availability is product-specific; a firmware-only repair should not be assumed.
  • No evidence of field exploitation is established by this research.
  • Research-strand review status: AI-assisted desk review; no physical reproduction or independent human acceptance claimed.

Follow-up

Performed

  • Read both original disclosure and current retrieved Siemens advisory V1.5.
  • Checked the current versioned ICS technique definition before the analyst cross-reference.

Result

  • Vendor confirmation, fixed-hardware distinctions and taxonomy-version changes are retained.

Unresolved / next

  • Confirm exact target hardware, firmware, access and mitigation state before any separate authorized assessment.

Evidence confidence · 91/100

Confidence components for primary-siemens-root-of-trust-2023
ComponentScoreReason
Provenance20/20Original source and provenance inspected.
Technical evidence32/35Technical evidence read; methods and outcome limits retained.
Configuration specificity19/20Device and configuration details are bounded; missing revisions remain unknown.
Independent corroboration11/15Independent corroboration is limited; taxonomy citation and same-team artifacts are not independent reproduction.
Follow-up resolution9/10Follow-up source checks performed; unresolved items remain explicit.

Framework mappings

Original record: https://redballoonsecurity.com/siemens-discovery/ (opens original source in a new tab) · Share: link to this record

HardwarePrimary hardware researchDemonstrationprimary-pcie-mitm-2020FPGA PCIe man-in-the-middle emulator demonstration78/100
Bounded outcome
The paper demonstrates a hardware platform for observing and replaying PCIe transactions in the tested setup.
Stated claim
FPGA PCIe man-in-the-middle emulator demonstration
Evidence status
Published research demonstration (published_research_demonstration)
Device, firmware & configuration

Description: Research host with PCIe3.0 and Stratix5 FPGA endpoint Configuration: Proof-of-concept emulator with protocol/timing constraints, rather than a demonstrated compromise of every smartphone interconnect.

Access required

Physical insertion/control of a specialized PCIe interposer/emulation platform.

Scope / hardware boundary
Proof-of-concept emulator with protocol/timing constraints, rather than a demonstrated compromise of every smartphone interconnect.
Dates
Published: 2020 · Reviewed: 1 November 2026 — Publication date precision: year.
Mechanisms
Peripheral Data Bus Interception

Sources

Limitations

  • Generic architectural reach and a concrete deployed-device exploit are different claims.
  • HAL deposit date2022 is not the2020 publication date.
  • No independent reproduction was found in the bounded source follow-up.
  • Research-strand review status: AI-assisted desk review; no physical reproduction or independent human acceptance claimed.

Follow-up

Performed

  • Followed the publisher citation to the author-deposited full paper and inspected the stated evaluation platform.

Result

  • Resolved the original source and correct publication/deposit distinction.

Unresolved / next

  • Confirm exact target hardware, firmware, access and mitigation state before any separate authorized assessment.

Evidence confidence · 78/100

Confidence components for primary-pcie-mitm-2020
ComponentScoreReason
Provenance20/20Original source and provenance inspected.
Technical evidence31/35Technical evidence read; methods and outcome limits retained.
Configuration specificity18/20Device and configuration details are bounded; missing revisions remain unknown.
Independent corroboration3/15Independent corroboration is limited; taxonomy citation and same-team artifacts are not independent reproduction.
Follow-up resolution6/10Follow-up source checks performed; unresolved items remain explicit.

Framework mappings

Original record: https://hal.science/hal-03228978v1/file/S0141933120303653.pdf (opens original source in a new tab) · Share: link to this record

Lead registry

Leads are sources not yet admitted as reviewed records. They carry no confidence score — null, not zero risk. 5 are pending or unresolved; 20 lead reviews are closed and listed separately.

Closed lead reviews

Pending or unresolved leads (5)
  • primary-lead-iommu-2010 Exploiting an I/OMMU vulnerability (opens original source in a new tab)

    Source review gap retained · Confidence: not scored

    Companion original-source evidence materially narrows the mechanism, but neither the SSTIC paper nor the existing 2018 Dell paper silently resolves the unread IEEE 5665798 original.

    Next check: Compare a normally accessible original IEEE manuscript with the SSTIC account if one becomes available. Retain publication/experiment lineage and avoid counting both venues as independent proof without distinct outcomes.

  • DR-L06 2011 Predator/Reaper support-computer malware: conflicting public accounts (opens original source in a new tab)

    Source review gap retained · Confidence: not scored

    Read additional contemporary Dark Reading coverage quoting the Air Force account: malware was described as a nuisance on a standalone mission-support network, with aircraft control reportedly unaffected. Repeated quotations are one statement chain, not independent forensic evidence. The original AF Space Command press record remains unlocated.

    Next check: Locate a normal public original AF Space Command record or authenticated official archival copy before resolving the competing accounts; retain as context, not a hardware-attack demonstration.

  • LRRK-COM-LEAD-001 STM32F103 voltage-glitch Reddit discussion (opens original source in a new tab)

    Source review gap retained · Confidence: not scored

    Three new targeted public origin-discovery queries, in addition to the three retained follow-up01 queries, did not establish a public original-author artifact attributable to the supplied Reddit post. The known unsupported Reddit URL was not resubmitted and no mirror was used. Search snippets and unrelated STM32-family studies remain discovery only.

    Next check: A normally accessible original-author artifact with a defensible identity connection to this post is required before claim review. Do not retry or mirror the restricted source.

  • LRRK-COM-LEAD-002 EEVblog STM32F4 level-2 protection discussion (opens original source in a new tab)

    Source review gap retained · Confidence: not scored

    New captures of the first three forum pages were reviewed with the reused last-page capture. Earlier success assertions do not establish F4 RDP2: one contributor explicitly says F4 was untested and cannot identify the F3 model involved. The later RDP2 assertion still lacks an exact tested F4 part/revision, protection-state evidence and a retained validated result. Searches returned only the known assertion and the already published FEV RDP1 article.

    Next check: Require an original F4/RDP2 configuration and validated result, or a normally accessible original correction. Reconcile the uncertain ST operation before any decision to retry it; no bypass or unrequested paid repeat.

  • LRRK-LEAD-HOBOT-2026 HOBOT S7 Pro: author-reported OTA data writes need an installation-boundary follow-up (opens original source in a new tab)

    Source reviewed installation boundary gap · Confidence: not scored

    The original paper reports unauthenticated OTA data writes using non-destructive payloads. A data-transfer characteristic accepting writes does not by itself prove firmware-image installation, activation or bypass of a later signature check. Official TID-211 requires an installation/authentication boundary, so no admitted TID-211 case is proposed.

    Next check: Review a normally accessible original artifact or follow-up documenting the on-device verification/installation state, or a vendor security response; do not operate a robot or attempt firmware writes.

How to read evidence confidence

LRRK analyst evidence confidence, 0–100. Evidence strength for the narrowly stated claim, not probability, severity, present-device applicability, safety or an official MITRE score. It is an analyst rubric, not a MITRE rating.

  • Provenance · up to 20
  • Technical evidence · up to 35
  • Configuration specificity · up to 20
  • Independent corroboration · up to 15
  • Follow-up resolution · up to 10

Null means the source strand provided no separate component reason. Overall rationale is retained; no reasons are invented.

Multiple citations, reposts, same-team artifacts or shared reports are not independent reproduction.

Method, attribution and licenses

Edition
2026-11-01.3 · schema 1 · reviewed through 1 November 2026
Review
AI-assisted public-source desk research. No LRRK physical reproduction, device actuation or independent human acceptance is asserted.
Read status
Reviewed means the research strand inspected the returned source material. Partial-page reads, targeted passages, omitted forum replies and blocked content remain explicit.
Classification
evidenceStatus preserves each strand's original label. evidenceGroup is a coarse compiler grouping and never upgrades the stated outcome.
Mechanisms
Community mechanism labels are preserved. When a strand supplied no separate list, mapped EMB3D threat names are used; an empty list is not proof of no mechanism.
Mapping attribution
officialCaseAttribution=false means no verified direct MITRE attribution of this exact case is asserted. Ambiguous official-evidence inventory labels are displayed as analyst inference and their original wording is retained in mapping provenance. Only source-reviewed direct references or explicitly labeled analyst inferences. No forced EMB3D-to-ATT&CK/ICS crosswalk or MITRE endorsement.
Coverage and gaps
A documented seed corpus with open gaps, not an exhaustive census of the internet. Normal interfaces, search excerpts, HTTP success and code availability do not themselves prove attacks.
Shared sources
Records describe distinct claims or contexts. Shared papers, reports, forum topics and related artifacts do not establish independent experiments. 16 shared-source groups are flagged on their records.
What this does not establish
This snapshot does not establish exploitation on any current LRRK device. Operational reports, advisories, demonstrations, unverified reports and discussions remain distinct.
Updates
Research is reviewed weekly (Mondays, 9 AM Pacific) into private drafts. Only meaningful changes are prepared, and nothing is published automatically; this page changes only when a new reviewed edition is released. It is not a live feed.
Pinned versions
MITRE EMB3D™ site 2.0.2, model 2.0.1, commit 0d7c25bb4e2928c516fb5811aaab9ff8bab2896c (repository (opens original source in a new tab)). MITRE ATT&CK® v20.0 (13 October 2026), verified through 1 November 2026 (ATT&CK (opens original source in a new tab)).
Independence
An independent LrrK implementation. Not produced, reviewed or endorsed by The MITRE Corporation. Original sources retain their own rights; this library links to them and summarises bounded findings.
MITRE EMB3D license and disclaimers

©2026 The MITRE Corporation. This work is reproduced and distributed with the permission of The MITRE Corporation. Terms of Use LICENSE The MITRE Corporation (MITRE) hereby grants you a non-exclusive, royalty-free license to use, copy, and create derivative works of EMB3D™ for internal business purposes or commercial use. Any copy you make for such purposes is authorized provided that you reproduce MITRE’s copyright designation and this license in any such copy and provide MITRE notice of such use at EMB3D@mitre.org. “©2026 The MITRE Corporation. This work is reproduced and distributed with the permission of The MITRE Corporation.” For all other uses of EMB3D™, contact MITRE at techtransfer@mitre.org. All rights not expressly granted are hereby reserved. Portions of EMB3D™ were produced for the U.S. Government under various contracts or funded by internal research and development funds and the U.S. Government retains certain rights in EMB3D™. You agree that you shall not include a charge for EMB3D™ in any sales or license of derivative products or services to the U.S. Government. Your use of MITRE’s website and EMB3D™ will comply with all relevant laws, regulations, Executive Orders, and other obligations. DISCLAIMERS MITRE does not claim EMB3D™ enumerates all possibilities for the types of actions and behaviors documented as part of EMB3D™’s adversary model and framework of techniques. Using the information contained within EMB3D™ to address or cover full categories of techniques will not guarantee full defensive coverage as there may be undisclosed techniques or variations on existing techniques not documented by EMB3D™. EMB3D™ AND ALL DOCUMENTS AND THE INFORMATION CONTAINED THEREIN ARE PROVIDED ON AN “AS IS” BASIS AND THE CONTRIBUTOR, THE ORGANIZATION HE/SHE REPRESENTS OR IS SPONSORED BY (IF ANY), THE MITRE CORPORATION, ITS BOARD OF TRUSTEES, OFFICERS, AGENTS, AND EMPLOYEES, DISCLAIM ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, ANY WARRANTY THAT THE USE OF THE INFORMATION THEREIN WILL NOT INFRINGE ANY RIGHTS OR ANY IMPLIED WARRANTIES OF ACCURACY, NONINFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.

https://emb3d.mitre.org/subtabs/terms-of-use.html (opens original source in a new tab)
MITRE ATT&CK license

MITRE ATT&CK® Terms of Use Source: https://attack.mitre.org/resources/legal-and-branding/terms-of-use/ Retrieved: 2026-11-01 The MITRE Corporation (MITRE) hereby grants you a non-exclusive, royalty-free license to use ATT&CK® for research, development, and commercial purposes. Any copy you make for such purposes is authorized provided that you reproduce MITRE's copyright designation and this license in any such copy. "© 2026 The MITRE Corporation. This work is reproduced and distributed with the permission of The MITRE Corporation." #### [DISCLAIMERS](https://attack.mitre.org/resources/legal-and-branding/terms-of-use/\#disclaimers) MITRE does not claim ATT&CK enumerates all possibilities for the types of actions and behaviors documented as part of its adversary model and framework of techniques. Using the information contained within ATT&CK to address or cover full categories of techniques will not guarantee full defensive coverage as there may be undisclosed techniques or variations on existing techniques not documented by ATT&CK. ALL DOCUMENTS AND THE INFORMATION CONTAINED THEREIN ARE PROVIDED ON AN "AS IS" BASIS AND THE CONTRIBUTOR, THE ORGANIZATION HE/SHE REPRESENTS OR IS SPONSORED BY (IF ANY), THE MITRE CORPORATION, ITS BOARD OF TRUSTEES, OFFICERS, AGENTS, AND EMPLOYEES, DISCLAIM ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY WARRANTY THAT THE USE OF THE INFORMATION THEREIN WILL NOT INFRINGE ANY RIGHTS OR ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See our [FAQ](https://attack.mitre.org/resources/faq) for more information on how to use and represent the ATT&CK name.

https://attack.mitre.org/resources/legal-and-branding/terms-of-use/ (opens original source in a new tab)